1. Field of the Invention
The present invention relates to a semiconductor device and method of manufacturing the semiconductor device, and more particularly, to a semiconductor device such that side wall spacers include silicon oxy nitride in a silicon oxide film gate type field effect transistor (hereinafter referred to as a “MOSFET transistor”) and a method of manufacturing such a semiconductor device.
2. Related Art
FIG. 1 is a schematic cross-sectional view of principal part to illustrate a semiconductor device of conventional technique. Using a MOSFET transistor as an example, a semiconductor device 100 of conventional technique will be described below with reference to FIG. 1.
An element isolation insulating layer 2 and impurity diffusion layers 3 are provided in a surface region of a semiconductor silicon substrate 1. The impurity diffusion layers 3 correspond to the source and drain of the semiconductor device 100.
Gate electrodes 5 are provided via gate oxide films 4 on the semiconductor silicon substrate 1. A gate electrode upper structure 9 is provided on each of the gate electrodes 5.
Further, a first inorganic compound insulating layer 8 comprised of silicon nitride is provided in contact with side surfaces of the gate oxide film 4 and gate electrode 5, and a second inorganic compound insulating layer 6 comprised of silicon oxide is provided in contact with the inorganic compound insulating layer 8.
As shown in FIG. 1, the semiconductor device 100 has side wall spacers 600 each comprised of the first inorganic compound insulating layer 8 and second inorganic compound insulating layer 6, and the side wall spacer 600 has a lacking portion in an interface portion (hereinafter, referred to as a “substrate interface portion”) of the semiconductor silicon substrate 1.
Further, an elevated source structure 701 and elevated drain structure 702 are provided in contact with the side wall spacer 600.
The elevated source structure 701 and elevated drain structure 702 are provided to fill the lacking portion of the substrate interface portion of the side wall spacer 600.
The lack of the substrate interface portion of the side wall spacer 600 is caused by an etching step and the like during the process of manufacturing the MOSFET transistor.
When such lack occurs, if the first organic compound insulating layer 8 does not exist, at least one of the elevated source structure 701 and elevated drain structure 702 may make electrical continuity with the gate electrode 5, becoming a cause of interference with the normal operation of the semiconductor device.
In order to avoid such continuity, it is proposed providing the semiconductor device 100 with the first inorganic compound insulating layer 8 comprised of silicon nitride in contact with both the side surface of the gate electrode 5 and the semiconductor silicon substrate 1 (JP 2000-91562).